ST72F260G1B6
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ST72F260G1B6 Features:
· Memories
– 4 K or 8 Kbytes Program memory: ROM or Single voltage extended Flash (XFlash) with read-out protection write protection and In- Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention: 20 years at 55°C.
– 256 bytes RAM
· Clock, Reset and Supply Management
– Enhanced reset system
– Enhanced low voltage supply supervisor (LVD) with 3 programmable levels and auxiliary voltage detector (AVD) with interrupt capability for implementing safe power-down procedures
– Clock sources: crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
– PLL for 2x frequency multiplication
– Clock-out capability
– 4 Power Saving Modes: Halt, Active Halt,Wait and Slow
· Interrupt Management
– Nested interrupt controller
– 10 interrupt vectors plus TRAP and RESET
– 22 external interrupt lines (on 2 vectors)
· 22 I/O Ports
– 22 multifunctional bidirectional I/O lines
– 20 alternate function lines
– 8 high sink outputs
· 4 Timers
– Main Clock Controller with Real time base and Clock-out capabilities
– Configurable watchdog timer
– Two 16-bit timers with: 2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
· 3 Communications Interfaces
– SPI synchronous serial interface
– I2C multimaster interface
– SCI asynchronous serial interface (LIN compatible)
· 1 Analog peripheral
– 10-bit ADC with 6 input channels
· Instruction Set
– 8-bit data manipulation
– 63 basic instructions
– 17 main addressing modes
– 8 x 8 unsigned multiply instruction
· Development Tools
– Full hardware/software development package
详细介绍请参考:
ST ST72F260G1B6技术手册:ST72F260G1B6.PDF
提供ST ST72F260G1B6 芯片解密服务,仅限学习、研究等合法用途。
联系方式:010-62245566 13810019655
· Memories
– 4 K or 8 Kbytes Program memory: ROM or Single voltage extended Flash (XFlash) with read-out protection write protection and In- Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention: 20 years at 55°C.
– 256 bytes RAM
· Clock, Reset and Supply Management
– Enhanced reset system
– Enhanced low voltage supply supervisor (LVD) with 3 programmable levels and auxiliary voltage detector (AVD) with interrupt capability for implementing safe power-down procedures
– Clock sources: crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
– PLL for 2x frequency multiplication
– Clock-out capability
– 4 Power Saving Modes: Halt, Active Halt,Wait and Slow
· Interrupt Management
– Nested interrupt controller
– 10 interrupt vectors plus TRAP and RESET
– 22 external interrupt lines (on 2 vectors)
· 22 I/O Ports
– 22 multifunctional bidirectional I/O lines
– 20 alternate function lines
– 8 high sink outputs
· 4 Timers
– Main Clock Controller with Real time base and Clock-out capabilities
– Configurable watchdog timer
– Two 16-bit timers with: 2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
· 3 Communications Interfaces
– SPI synchronous serial interface
– I2C multimaster interface
– SCI asynchronous serial interface (LIN compatible)
· 1 Analog peripheral
– 10-bit ADC with 6 input channels
· Instruction Set
– 8-bit data manipulation
– 63 basic instructions
– 17 main addressing modes
– 8 x 8 unsigned multiply instruction
· Development Tools
– Full hardware/software development package
详细介绍请参考:
ST ST72F260G1B6技术手册:ST72F260G1B6.PDF
提供ST ST72F260G1B6 芯片解密服务,仅限学习、研究等合法用途。
联系方式:010-62245566 13810019655