ST72F324BJ2B5
浏览次数:0
ST72F324BJ2B5 Features:
· Memories
– 8 to 32K dual voltage High Density Flash (HDFlash) or ROM with read-out protection capability. In-Application Programming and In- Circuit Programming for HDFlash devices
– 384 to 1K bytes RAM
– HDFlash endurance: 100 cycles, data retention: 20 years at 55°C
· Clock, Reset And Supply Management
– Clock sources: crystal/ceramic resonator oscillators, internal RC oscillator, and bypass for external clock
– PLL for 2x frequency multiplication
– Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
· Interrupt Management
– Nested interrupt controller
– 10 interrupt vectors plus TRAP and RESET
– 9/6 external interrupt lines (on 4 vectors)
· Up to 32 I/O Ports
– 32/24 multifunctional bidirectional I/O lines
– 22/17 alternate function lines
– 12/10 high sink outputs
· 4 Timers
– Main Clock Controller with: Real time base, Beep and Clock-out capabilities
– Configurable watchdog timer
– 16-bit Timer A with: 1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
– 16-bit Timer B with: 2 input captures, 2 output compares, PWM and pulse generator modes
· 2 Communication Interfaces
– SPI synchronous serial interface
– SCI asynchronous serial interface
· 1 Analog Peripheral
– 10-bit ADC with up to 12 input ports
· Instruction Set
– 8-bit Data Manipulation
– 63 Basic Instructions
– 17 main Addressing Modes
– 8 x 8 Unsigned Multiply Instruction
· Development Tools
– Full hardware/software development package
– In-Circuit Testing capability
详细介绍请参考:
ST ST72F324BJ2B5技术手册:ST72F324BJ2B5.PDF
提供ST ST72F324BJ2B5 芯片解密服务,仅限学习、研究等合法用途。
· Memories
– 8 to 32K dual voltage High Density Flash (HDFlash) or ROM with read-out protection capability. In-Application Programming and In- Circuit Programming for HDFlash devices
– 384 to 1K bytes RAM
– HDFlash endurance: 100 cycles, data retention: 20 years at 55°C
· Clock, Reset And Supply Management
– Clock sources: crystal/ceramic resonator oscillators, internal RC oscillator, and bypass for external clock
– PLL for 2x frequency multiplication
– Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
· Interrupt Management
– Nested interrupt controller
– 10 interrupt vectors plus TRAP and RESET
– 9/6 external interrupt lines (on 4 vectors)
· Up to 32 I/O Ports
– 32/24 multifunctional bidirectional I/O lines
– 22/17 alternate function lines
– 12/10 high sink outputs
· 4 Timers
– Main Clock Controller with: Real time base, Beep and Clock-out capabilities
– Configurable watchdog timer
– 16-bit Timer A with: 1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
– 16-bit Timer B with: 2 input captures, 2 output compares, PWM and pulse generator modes
· 2 Communication Interfaces
– SPI synchronous serial interface
– SCI asynchronous serial interface
· 1 Analog Peripheral
– 10-bit ADC with up to 12 input ports
· Instruction Set
– 8-bit Data Manipulation
– 63 Basic Instructions
– 17 main Addressing Modes
– 8 x 8 Unsigned Multiply Instruction
· Development Tools
– Full hardware/software development package
– In-Circuit Testing capability
详细介绍请参考:
ST ST72F324BJ2B5技术手册:ST72F324BJ2B5.PDF
提供ST ST72F324BJ2B5 芯片解密服务,仅限学习、研究等合法用途。